timing controller
英 [ˈtaɪmɪŋ kənˈtrəʊlə(r)]
美 [ˈtaɪmɪŋ kənˈtroʊlər]
定时器
双语例句
- A high-efficiency energy saving and automatic timing controller, composed of CMOS IC for oil pumps in the oil field, was introduced in this paper.
本文介绍用CMOS集成电路组成的油田抽油机高效节能定时自动控制器，在样机模拟实验的基础上，较详细地分析了电路的工作原理和特性。 - However, for the controllable silicon isochronous series low timing system, that using the digital PLC and intelligent controller its capability is more consummate, which is doable to the.
这些实验涉及了气动系统的组成、单片机控制技术、PLC控制技术、计算机与单片机组成的集散控制系统、以及多机械手协同作业等内容，应用效果理想。 - And it is pointed out that the sanle can be developed into a commonly used multiple timing controller.
同时指出，这种控制器还可发展成为一种通用的多路定时控制器。 - Programmable Timing Sequence Controller with CMOS IC
采用CMOS数字集成电路的可编程时间顺序控制器 - Design of Timing Controller for LCD System
中、小尺寸TFT-LCD系统时序控制模块的设计 - The trigger function, module identification and accurate timing in the modules are not only the important characters of the VXIbus system but also the important parts of a VXI controller module.
触发功能、模块识别和精确定时是VXI总线的重要特性，同时也是VXI控制模块的重要组成部分。 - Features of DDR SDRAM, basic configuration and timing of DDR controller, together with basic configuration and timing of PCI bus, are discussed first, while basic theory and development process of FPGA are introduced.
论文中首先讨论了DDRSDRAM的特性，DDR控制器的基本结构和时序，以及PCI总线的基本结构和时序，并介绍了FPGA的基本原理和开发过程。 - According to the requirement of the whole system and the characteristic of DDR SDRAM, the paper presents the optimized solution in structure and timing aspect. Implementation of DDR SDRAM Controller Based on FPGA
根据DDR的工作原理和系统带宽要求，给出了DDR控制器关键部分在结构上和时序上的优化方案。一种DDRSDRAM控制器设计 - Application of Electric and Erasable PROM to Programmable Timing Controller
E~2PROM在可编程定时控制器中的应用 - Design of Simple Timing Controller and Chronopher System Based on PLC
基于PLC的简易定时报时器系统的设计 - In order to flexibly control the injection pressure, timing& quantity of the high pressure common rail system, we have developed an electronically controlled unit ( ECU) based on the 32 bit high performance micro controller.
为了实现对高压共轨系统喷射压力、喷射定时及喷油量的灵活控制，开发了基于32位高性能单片机的电子控制单元（ECU）。 - The Interface Timing Design between CAN Controller And ARM Microprocessor
CAN总线控制器与ARM微处理器的接口时序设计 - The Design and FPGA Verification of TFT-LCD Timing Controller
液晶显示时序控制电路的设计及验证 - The Multifunction Timing Controller, which Based on the One-piece Machine
基于单片机的多功能定时控制器 - This type of interface support AMBA bus protocol. DMA interface was also integrated in the interface module. Users can set the differentiate-rate and the display timing parameter by reconfigure internal registers of LCD controller.
该接口模块支持AMBA总线协议，具有DMA接口，内部的配置寄存器支持用户灵活配置分辨率、显示控制时序等参数。 - The interface relation between the CCD Timing Generator and CCD controller was also discussed.
给出了它与CCD控制器的接口关系：由CCD控制器给出的指令和数据予以控制。 - Design of A General-purpose Programmable Timing Controller
通用可编程定时控制器的设计 - The result of the timing simulation shows that we can easily realize the data transfer and the intercommunication between PC and FPGA by using the PCI local bus controller.
仿真结果说明，采用该PCI局部总线控制器可以很方便地实现PC机和FPGA之间的数据流传输，并能很好地完成PC和FPGA间的交互通信功能。 - Computerized calender/ clock and timing controller
电脑日历时钟及定时控制器 - Design of Digital Microwave Power Continuously Adjusting and Timing Controller
微波数字连续调功及时间控制器设计 - The high speed write is realized by generating high speed write timing in controller, controlling address in decoder, and storing data in write/ read driver.
通过在控制电路中产生高速写脉冲，在译码电路控制地址，在读写驱动电路暂存数据实现了高速写。 - An Optimum Design of Timing Sequence Programme Controlled by Programmable Controller
可编程控制器控制时序程序的一种优化设计 - By analyzing the relationship between timing and performance of DDR2 and combining the application of SSD, we optimized the performance of the DDR2 controller, which improved the bandwidth utilization while reducing the power.
通过分析DDR2的时序与性能间的关系并结合固态硬盘的应用，对DDR2控制器进行了性能上的优化，降低DDR2的功耗的同时提高了DDR2的带宽利用率。 - Arbitration and control module is the main part of the top module used to implement the state machine and system timing control. Parameter table module is the SDRAM memory controller interface for reading parameter information when image processing.
仲裁与控制模块是顶模块的主体部分，主要实现系统状态机和时序控制；参数表模块主要实现SDRAM存储器的控制器接口，用于图像处理时读取参数信息。 - When all under-controlled modules are designed, the timing of the CPU is arranged by the controller.
在设计好CPU内部各个受控功能模块后，最后由控制器安排CPU的工作时序。 - We often control the DC timing system of propeller by the classical PID controller.
对于推进器的直流调速系统，常采用传统PID控制。 - For this module, mainly complete timing control module, DMA controller reads data from SDRAM and stored in FIFO, and then timing control module read the data from FIFO to show in LCD screen.
对于该模块，主要完成了时序控制模块的编写，DMA控制器将SDRAM中的数据读到FIFO缓存中，然后经过时序控制模块再将FIFO中的数据读出显示到LCD液晶肼上。 - According to the timing of SDRAM operation, the SDRAM controller was designed using verilog hardware description language, so that other modules could control the reading and writing operations of the SDRAM.
通过分析SDRAM操作时序的要求，用verilog硬件描述语言实现SDRAM控制器的设计，以便于其它模块对SDRAM的读写操作。